vivado xsim 终端 模拟

只模拟的话直接终端运行会快很多
计数器举例

mkdir src

counter.v

module counter(
  input wire clk,
  input wire rst_n,
  output reg[31:0] cnt 
);
always @(posedge clk or negedge rst_n)
  if(!rst_n)
    cnt <= 31'h0;
  else
    cnt <= cnt+1;

endmodule  

tb.v

module tb;
wire[31:0] out;
reg clk;
reg rst_n;

initial begin
  #10 clk <= 1'b0;
  #10 rst_n = 1'b0;
  #10 rst_n = 1'b1;
  #5000 $finish;
end

always #1 clk = ~clk;

counter c1(clk,rst_n,out);

endmodule  

编译 创建模拟snapshot

mkdir sim
cd sim
xvlog ../src/counter.v ../src/tb.v
xelab -debug typical -top tb -snapshot tb

创建脚本
xsim_cfg.tcl

 log_wave -recursive *
 run all
 exit  

xsim tb --tclbatch xsim_cfg.tcl

打开gui

xsim --gui tb.wdb